The present invention is related to spread spectrum communication systems.
Spread spectrum communication systems use much wider spectral bandwidths than theoretically necessary, spreading the transmitted energy over the wide bandwidth to reduce the possibility of unauthorized detection and to obtain other well known benefits. There exist at least two basic spread spectrum techniques, the frequency hopping and the psuedonoise (PN) encoding techniques. The present invention relates to the latter technique.
In the typical PN technique, a pseudorandom noise signal is superimposed on the information signal by the transmitter equipment. The receiver then removes the pseudorandom noise before processing the information signal. In order to remove the particular pseudorandom noise signal superimposed on the received signal, the receiver must in some way be synchronized to the transmitter.
For synchronization, it is necessary to determine the time of arrival of a burst as well as its frequency. A PN synchronization ("sync") preamble is employed at the beginning of a data burst as a system overhead dedicated to the synchronization process. This is indicated in graphical form in FIG. 1. The pattern of the sync preamble is known a priori to both the transmitter and receiver. A sync preamble correlation detector is typically employed at the receiver to detect the sync preamble. It is necessary that the correlation detector be able to operate in the presence of frequency error.
Reliable data detection requires the frequency error to be small. For phase-modulated data symbols, large frequency errors or offsets disturb the signal and make reliable data detection virtually impossible. The frequency error or offset is the difference between the transmitting and receiving frequencies and may be caused by a number of factors, including doppler shift or receiver or transmitter oscillator frequency shift.
To accommodate large frequency errors, the conventional sync preamble correlation detection circuitry performs both linear (pre-detection) and non-linear (post-detection) integration of the products of the received preamble bits or chips with the reference preamble. Also, to shorten the length of the preamble required, the conventional design employs a technique whereby the linear integration time is such that the resultant output signal phase either advances or retards 90.degree. from one subcorrelator to the next. The subcorrelator is the circuit by which correlation and linear integration are performed. The conventional design sets the linear integration time to 1/4F seconds, where F denotes the maximum frequency offset or error expected.
When improvement on the signal-to-noise ratio (SNR) resulting from the 1/4F second linear integration is insufficient to support a desired probability of detection at a desired false alarm rate, the conventional design then applies the non-linear integration to further improve the SNR. Since, as is well known, the non-linear integration is less efficient in improving the SNR than linear integration, a frequency search approach is sometimes employed to extend the linear integration time beyond the 1/4F seconds, so that the number of non-linear integration operations can be reduced. Such a search may be executed either in a serial or parallel manner. While the implementation of the serial search requires minimal hardware, it may consume a preamble acquisition time longer than allowed. On the other hand, implementation of a parallel search requires using multiple frequency sensitive circuits for simultaneously examining the subbands of the frequency uncertainty window. However, size, weight and cost considerations often forbid the use of the preamble correlation detector having a parallel searching feature.
A known technique for obtaining the frequency offset estimate from the subcorrelator outputs involves computation of the phase changes between adjacent pairs of subcorrelator outputs. However, this frequency estimation technique has not been found to significantly improve the performance of the sync preamble correlation detection.
It is therefore an object of the present invention to provide a preamble correlation detector having a parallel searching feature at relatively low cost.
Another object of the invention is to provide a device which simultaneously performs sync preamble correlation detection and frequency offset estimation functions.
A further object of the invention is to provide a correlator processor adapted for linear reintegration of subcorrelator outputs in a highly efficient manner.
Another object is to provide a PN preamble correlation detector requiring a reduced signal-to-noise ratio threshold for detecting the arrival of th PN sequence.